References

  1. adgh96. S. Adve and K. Gharachorloo. http://www-ece.rice.edu /~sarita/Publications/model_tutorial.ps. 1996.
  2. coll81. W. W. Collier. "Principles of Architecture for Systems of Parallel Processes." Technical Report TR 00.3100, IBM Corporation, Poughkeepsie, NY, March 25, 1981.
  3. coll84. W. W. Collier. "Architectures for Systems of Parallel Processes." Technical Report TR 00.3253, IBM Corporation, Poughkeepsie, NY, Jan. 27, 1984.
  4. coll92. W. W. Collier. Reasoning About Parallel Architectures. Prentice-Hall, Englewood Cliffs, NJ, 1992. Errata.
  5. dijk65. E. W. Dijkstra. "Solution of a problem in concurrent programming control." Comm. ACM 8:9 (1965), 569.
  6. ghug99. R. Ghughal. "Test Model-Checking Approach to Verification of Formal Memory Models", Department of Computer Science, University of Utah, December, 1999.
  7. good89. J. Goodman. "Cache Consistency and Sequential Consistency". Technical Report No. 61, SCI Committee, March 1989.
  8. hill97. M. D. Hill. "Multiprocessors Should Support Simple Memory Consistency Models". Univ. of Wisconsin Computer Sciences Technical Report #1353, October 1997 (ftp://ftp.cs.wisc.edu/wwt/tr97_sc_case.ps).
  9. kuck80. D. J. Kuck, R. H. Kuhn, B. Leasure, and M. Wolfe. "The Structure of an Advanced Vectorizer for Pipelined Processors". Proceedings of the IEEE Computer Software and Applications Conference (4th), COMPSAC 80, Chicago, Il. 1980. pp. 709-715.
  10. lamp78. L. Lamport. "Time, Clocks, and the Ordering of Events in a Distributed System." Comm. ACM 21,7 (July 1978), pp. 558-565.
  11. lamp79. L. Lamport. "How to Make a Multiprocessor Computer That Correctly Executes Multiprocess Programs." IEEE Transactions on Computers C28:9 (1979).
  12. mntz96. D. T. Marr, S. Natarajan, S. Thakkar, R. Zucker. "Multiprocessor Validation of the Pentium Pro. Computer", Nov. 1996. p. 47-53.
  13. nalu99. R. P. Nalumasu. "Formal Design and Verification Methods for Shared Memory Systems", Department of Computer Science, University of Utah, May, 1999.
  14. ngmg98. R. Nalumasu, R. Ghughal, A. Mokkedem, G. Gopalakrishnan. "The 'Test Model-checking' Approach to the Verification of Formal Memory Models of Multiprocessors", Department of Computer Science, University of Utah, Report No. UUCS-98-008. Also available at citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.37.1494.

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